{"id":4270,"date":"2025-02-27T23:20:23","date_gmt":"2025-02-27T16:20:23","guid":{"rendered":"https:\/\/labantrithuc.com\/?p=4270"},"modified":"2025-02-27T23:20:25","modified_gmt":"2025-02-27T16:20:25","slug":"tien-trinh-thu-nho-kich-thuoc-linh-kien-ban-dan-ky-3","status":"publish","type":"post","link":"https:\/\/labantrithuc.com\/?p=4270","title":{"rendered":"Ti\u1ebfn tr\u00ecnh thu nh\u1ecf k\u00edch th\u01b0\u1edbc linh ki\u1ec7n b\u00e1n d\u1eabn (K\u1ef3 3)"},"content":{"rendered":"\n<blockquote class=\"wp-block-quote is-layout-flow wp-block-quote-is-layout-flow\">\n<p>Hu\u1ef3nh C\u00f4ng T\u00fa<\/p>\n<\/blockquote>\n\n\n\n<p>Ng\u00e0nh c\u00f4ng nghi\u1ec7p b\u00e1n d\u1eabn tu\u00e2n theo <strong>\u0110\u1ecbnh lu\u1eadt Moore<\/strong>, li\u00ean t\u1ee5c thu nh\u1ecf k\u00edch th\u01b0\u1edbc transistor v\u00e0 t\u0103ng m\u1eadt \u0111\u1ed9 t\u00edch h\u1ee3p. C\u00e1c th\u1ebf h\u1ec7 c\u00f4ng ngh\u1ec7 \u0111\u01b0\u1ee3c g\u1ecdi theo \u201cnode\u201d (n\u00fat c\u00f4ng ngh\u1ec7) t\u00ednh b\u1eb1ng \u0111\u01a1n v\u1ecb nm, d\u00f9 gi\u00e1 tr\u1ecb nm ng\u00e0y nay ch\u1ec9 l\u00e0 t\u00ean g\u1ecdi mang t\u00ednh <em>th\u01b0\u01a1ng m\u1ea1i<\/em> h\u01a1n l\u00e0 k\u00edch th\u01b0\u1edbc th\u1ef1c. Trong th\u1eadp ni\u00ean 2010s, ch\u00fang ta ch\u1ee9ng ki\u1ebfn l\u1ed9 tr\u00ecnh thu nh\u1ecf t\u1eeb <strong>10 nm xu\u1ed1ng 7 nm, 5 nm, 3 nm v\u00e0 s\u1eafp ti\u1ebfn t\u1edbi 2 nm<\/strong>. M\u1ed7i b\u01b0\u1edbc ti\u1ebfn l\u00e0 k\u1ebft qu\u1ea3 c\u1ee7a nh\u1eefng c\u1ea3i ti\u1ebfn \u0111\u1ed9t ph\u00e1 v\u1ec1 quang kh\u1eafc, v\u1eadt li\u1ec7u v\u00e0 ki\u1ebfn tr\u00fac linh ki\u1ec7n.<\/p>\n\n\n\n<p><strong>Xu h\u01b0\u1edbng thu nh\u1ecf t\u1eeb 10nm \u0111\u1ebfn 2nm:<\/strong> Node 10 nm (kho\u1ea3ng 2016\u20132017) \u0111\u00e1nh d\u1ea5u ranh gi\u1edbi cu\u1ed1i c\u00f9ng s\u1eed d\u1ee5ng ho\u00e0n to\u00e0n quang kh\u1eafc DUV v\u1edbi multiple patterning. Samsung v\u00e0 TSMC b\u1eaft \u0111\u1ea7u s\u1ea3n xu\u1ea5t 10 nm v\u00e0o 2016\u20132017, trong khi Intel g\u1eb7p tr\u1ee5c tr\u1eb7c v\u00e0 ch\u1eadm \u1edf node 10 nm \u0111\u1ebfn 2019. Ti\u1ebfp \u0111\u00f3, <strong>7 nm (2018)<\/strong> l\u00e0 b\u01b0\u1edbc \u0111\u1ed9t ph\u00e1 v\u1edbi vi\u1ec7c b\u1eaft \u0111\u1ea7u \u1ee9ng d\u1ee5ng EUV h\u1ea1n ch\u1ebf. TSMC v\u00e0 Samsung \u0111\u1ec1u \u0111\u1ea1t s\u1ea3n xu\u1ea5t \u0111\u1ea1i tr\u00e0 7 nm n\u0103m 2018\u200b. TSMC 7 nm ban \u0111\u1ea7u d\u00f9ng DUV multiple patterning, nh\u01b0ng phi\u00ean b\u1ea3n 7nm+ c\u1ea3i ti\u1ebfn \u0111\u00e3 \u0111\u01b0a v\u00e0i l\u1edbp EUV v\u00e0o quy tr\u00ecnh. <strong>5 nm (2020)<\/strong>: TSMC b\u1eaft \u0111\u1ea7u s\u1ea3n xu\u1ea5t 5 nm t\u1eeb n\u1eeda \u0111\u1ea7u 2019 (risk production) v\u00e0 ramp up 2020\u200b, ho\u00e0n to\u00e0n d\u1ef1a v\u00e0o EUV cho ~10\u201314 l\u1edbp tr\u00ean m\u1ed7i wafer. Samsung c\u0169ng tri\u1ec3n khai 5 nm (5LPE) trong 2020. \u0110\u1ebfn <strong>3 nm<\/strong>, Samsung l\u00e0 h\u00e3ng \u0111\u1ea7u ti\u00ean c\u00f4ng b\u1ed1 s\u1ea3n xu\u1ea5t th\u1eed nghi\u1ec7m 3 nm GAA (transistor Gate-All-Around) v\u00e0o th\u00e1ng 6\/2022\u200b, c\u00f2n TSMC b\u1eaft \u0111\u1ea7u s\u1ea3n xu\u1ea5t 3 nm cu\u1ed1i 2022 (cho Apple A17 Pro 2023)\u200b. Node <strong>2 nm<\/strong> d\u1ef1 ki\u1ebfn th\u01b0\u01a1ng m\u1ea1i kho\u1ea3ng 2024\u20132025: TSMC \u0111\u00e3 l\u00ean k\u1ebf ho\u1ea1ch risk production 2 nm (N2) v\u00e0o 2024 v\u00e0 mass production n\u0103m 2025\u200b. Intel th\u00ec \u0111\u1eb7t t\u00ean l\u1ea1i l\u1ed9 tr\u00ecnh c\u1ee7a m\u00ecnh: \u201cIntel 4\u201d (t\u01b0\u01a1ng \u0111\u01b0\u01a1ng ~7 nm EUV) n\u0103m 2023, \u201cIntel 3\u201d (~5 nm) n\u0103m 2024, v\u00e0 \u201cIntel 20A\u201d (~2 nm, 20 angstrom) d\u1ef1 ki\u1ebfn cu\u1ed1i 2024, \u201c18A\u201d (1.8 nm) v\u00e0o 2025. N\u1ebfu \u0111\u00fang l\u1ed9 tr\u00ecnh, Intel 20A\/18A v\u00e0 TSMC 2nm s\u1ebd c\u1ea1nh tranh s\u00e1t sao. Samsung c\u0169ng nh\u1eafm 2 nm n\u0103m 2025 cho th\u1ebf h\u1ec7 GAA ti\u1ebfp theo.<\/p>\n\n\n\n<p><strong>L\u1ed9 tr\u00ecnh c\u1ee7a c\u00e1c \u201c\u00f4ng l\u1edbn\u201d:<\/strong> <em>TSMC<\/em> hi\u1ec7n \u0111ang d\u1eabn \u0111\u1ea7u v\u1ec1 ti\u1ebfn \u0111\u1ed9 c\u00f4ng ngh\u1ec7 khi cung c\u1ea5p chip 3 nm s\u1edbm cho Apple (2023) v\u00e0 d\u1ef1 ki\u1ebfn 2 nm cho Apple v\u00e0o kho\u1ea3ng 2025\u200b. <em>Intel<\/em> tuy ch\u1eadm \u1edf 10 nm nh\u01b0ng \u0111\u1eb7t m\u1ee5c ti\u00eau \u201c5 node trong 4 n\u0103m\u201d, k\u1ef3 v\u1ecdng l\u1ea5y l\u1ea1i v\u1ecb tr\u00ed d\u1eabn \u0111\u1ea7u v\u00e0o kho\u1ea3ng 2025 v\u1edbi c\u00f4ng ngh\u1ec7 angstrom (d\u01b0\u1edbi 2 nm). <em>Samsung<\/em> th\u00ec chuy\u1ec3n \u0111\u1ed5i ki\u1ebfn tr\u00fac transistor t\u1eeb FinFET sang GAAFET s\u1edbm t\u1ea1i 3 nm (2022) nh\u1eb1m c\u1ea1nh tranh, v\u00e0 s\u1ebd ti\u1ebfp t\u1ee5c c\u1ea3i thi\u1ec7n \u1edf 2 nm, 1.4 nm. D\u00f9 l\u1ed9 tr\u00ecnh chi ti\u1ebft kh\u00e1c nhau, c\u1ea3 ba h\u00e3ng \u0111\u1ec1u \u0111\u1ed3ng thu\u1eadn r\u1eb1ng: <strong>EUV l\u00e0 ch\u00eca kh\u00f3a<\/strong> cho c\u00e1c node d\u01b0\u1edbi 7 nm, v\u00e0 s\u1ebd c\u1ea7n n\u00e2ng c\u1ea5p EUV (High-NA) cho node ~1.x nm. V\u00ed d\u1ee5, TSMC x\u00e1c nh\u1eadn s\u1ebd t\u00edch h\u1ee3p m\u00e1y EUV High-NA v\u00e0o quy tr\u00ecnh 1.4 nm (\u0111\u01b0\u1ee3c g\u1ecdi l\u00e0 N1.4 ho\u1eb7c \u201cA14\u201d) d\u1ef1 ki\u1ebfn s\u1ea3n xu\u1ea5t n\u0103m 2027\u200b. Intel th\u1eadm ch\u00ed \u0111\u00e3 \u0111\u1eb7t mua to\u00e0n b\u1ed9 nh\u1eefng chi\u1ebfc m\u00e1y High-NA \u0111\u1ea7u ti\u00ean c\u1ee7a ASML cho R&amp;D n\u0103m 2023\u20132024 v\u00e0 d\u1ef1 ki\u1ebfn d\u00f9ng \u1edf Intel 18A (~2025\u20132026). Samsung c\u0169ng kh\u00f4ng \u0111\u1ee9ng ngo\u00e0i cu\u1ed9c khi h\u1ee3p t\u00e1c v\u1edbi ASML \u0111\u1ec3 s\u1edbm ti\u1ebfp c\u1eadn High-NA cho th\u1ebf h\u1ec7 sau 2 nm.<\/p>\n\n\n\n<p><strong>Th\u00e1ch th\u1ee9c v\u1ec1 \u0111\u1ed9 ch\u00ednh x\u00e1c v\u00e0 chi ph\u00ed:<\/strong> Thu nh\u1ecf k\u00edch th\u01b0\u1edbc \u0111i k\u00e8m v\u1edbi t\u0103ng <strong>\u0111\u1ed9 ph\u1ee9c t\u1ea1p<\/strong> v\u00e0 <strong>chi ph\u00ed v\u01b0\u1ee3t b\u1eadc<\/strong>. C\u00f3 m\u1ed9t s\u1ed1 th\u00e1ch th\u1ee9c ch\u00ednh sau \u0111\u00e2y:<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li><strong>\u0110\u1ed9 ch\u00ednh x\u00e1c ch\u1ebf t\u1ea1o:<\/strong> Khi k\u00edch th\u01b0\u1edbc gi\u1ea3m, <em>sai s\u1ed1 cho ph\u00e9p<\/em> c\u0169ng gi\u1ea3m theo. \u0110\u1ed9 sai l\u1ec7ch c\u0103n ch\u1ec9nh gi\u1eefa c\u00e1c l\u1edbp (overlay) ph\u1ea3i gi\u1eef d\u01b0\u1edbi v\u00e0i nm; \u0111\u1ed9 dao \u0111\u1ed9ng k\u00edch th\u01b0\u1edbc <em>line-width<\/em> hay <em>edge roughness<\/em> c\u0169ng ph\u1ea3i ki\u1ec3m so\u00e1t ch\u1eb7t. \u1ede thang 5 nm, nh\u1eefng bi\u1ebfn thi\u00ean ng\u1eabu nhi\u00ean trong qu\u00e1 tr\u00ecnh kh\u1eafc ho\u1eb7c hi\u1ec7n \u1ea3nh c\u00f3 th\u1ec3 chi\u1ebfm t\u1ef7 l\u1ec7 \u0111\u00e1ng k\u1ec3 so v\u1edbi k\u00edch th\u01b0\u1edbc pattern, d\u1eabn \u0111\u1ebfn l\u1ed7i nghi\u00eam tr\u1ecdng. Hi\u1ec7n t\u01b0\u1ee3ng <em>stochastic defects<\/em> trong EUV \u2013 t\u1ee9c c\u00e1c khuy\u1ebft t\u1eadt ng\u1eabu nhi\u00ean do ph\u00e2n b\u1ed1 photon \u2013 tr\u1edf th\u00e0nh v\u1ea5n \u0111\u1ec1 n\u1ed5i c\u1ed9m, \u0111\u00f2i h\u1ecfi gi\u1ea3i ph\u00e1p c\u1ea3 v\u1ec1 resist l\u1eabn ki\u1ec3m tra, s\u1eeda l\u1ed7i\u200b.<\/li>\n\n\n\n<li><strong>Gi\u1edbi h\u1ea1n thi\u1ebft b\u1ecb:<\/strong> M\u00e1y m\u00f3c quang kh\u1eafc c\u00e0ng ph\u1ea3i tinh vi h\u01a1n. 193 nm \u0111\u00e3 \u0111\u1ea1t c\u1ef1c h\u1ea1n n\u00ean bu\u1ed9c ph\u1ea3i d\u00f9ng nhi\u1ec1u l\u1ea7n ph\u01a1i, l\u00e0m t\u0103ng r\u1ee7i ro. EUV tuy gi\u1ea3i quy\u1ebft \u0111\u01b0\u1ee3c \u0111\u1ed9 ph\u00e2n gi\u1ea3i nh\u01b0ng b\u1ea3n th\u00e2n thi\u1ebft b\u1ecb EUV r\u1ea5t ph\u1ee9c t\u1ea1p, hi\u1ec7u su\u1ea5t ch\u01b0a cao, d\u1ec5 g\u1eb7p s\u1ef1 c\u1ed1 (v\u00ed d\u1ee5 h\u1ec7 g\u01b0\u01a1ng \u0111\u00f2i h\u1ecfi \u0111\u1ed9 ch\u00ednh x\u00e1c nguy\u00ean t\u1eed). Vi\u1ec7c \u0111\u01b0a EUV v\u00e0o s\u1ea3n xu\u1ea5t h\u00e0ng lo\u1ea1t ban \u0111\u1ea7u g\u1eb7p nhi\u1ec1u kh\u00f3 kh\u0103n v\u1ec1 \u1ed5n \u0111\u1ecbnh, hi\u1ec7u su\u1ea5t ho\u1ea1t \u0111\u1ed9ng v\u00e0 khuy\u1ebft t\u1eadt mask, khi\u1ebfn m\u1ed9t s\u1ed1 h\u00e3ng (nh\u01b0 Intel) ph\u1ea3i tr\u00ec ho\u00e3n \u00e1p d\u1ee5ng EUV cho \u0111\u1ebfn khi th\u1eadt s\u1ef1 tin c\u1eady\u200b.<\/li>\n\n\n\n<li><strong>Chi ph\u00ed s\u1ea3n xu\u1ea5t leo thang:<\/strong> M\u1ed7i th\u1ebf h\u1ec7 n\u00fat m\u1edbi, chi ph\u00ed <strong>R&amp;D<\/strong> v\u00e0 <strong>s\u1ea3n xu\u1ea5t<\/strong> \u0111\u1ec1u t\u0103ng m\u1ea1nh. Ch\u1eb3ng h\u1ea1n, gi\u00e1 m\u1ed9t t\u1ea5m wafer 300 mm t\u0103ng t\u1eeb kho\u1ea3ng <strong>$10.000 \u1edf node 7 nm l\u00ean ~ $16.000 \u1edf 5 nm v\u00e0 $20.000 \u1edf 3 nm<\/strong> (t\u0103ng ~25% m\u1ed7i th\u1ebf h\u1ec7)\u200b. Nguy\u00ean nh\u00e2n ch\u00ednh l\u00e0 do ph\u1ea3i d\u00f9ng nhi\u1ec1u l\u1edbp EUV \u0111\u1eaft \u0111\u1ecf v\u00e0 t\u1ef7 l\u1ec7 ph\u1ebf ph\u1ea9m cao h\u01a1n \u1edf k\u00edch th\u01b0\u1edbc nh\u1ecf. Thi\u1ebft k\u1ebf chip \u1edf c\u00e1c node n\u00e0y c\u0169ng t\u1ed1n k\u00e9m h\u00e0ng tr\u0103m tri\u1ec7u USD do \u0111\u1ed9 ph\u1ee9c t\u1ea1p t\u0103ng\u200b. Ch\u1ec9 nh\u1eefng c\u00f4ng ty c\u00f3 s\u1ea3n l\u01b0\u1ee3ng r\u1ea5t l\u1edbn (Apple, AMD, Nvidia&#8230;) m\u1edbi g\u00e1nh n\u1ed5i chi ph\u00ed.<\/li>\n\n\n\n<li><strong>Hi\u1ec7u su\u1ea5t v\u00e0 ti\u00eau th\u1ee5 \u0111i\u1ec7n:<\/strong> C\u00e0ng thu nh\u1ecf, vi\u1ec7c <strong>gi\u1ea3m \u0111i\u1ec7n dung k\u00fd sinh<\/strong> v\u00e0 t\u0103ng t\u1ed1c \u0111\u1ed9 chuy\u1ec3n m\u1ea1ch tr\u1edf n\u00ean kh\u00f3 kh\u0103n, khi\u1ebfn l\u1ee3i \u00edch hi\u1ec7u n\u0103ng b\u1ecb thu h\u1eb9p. \u0110\u1ed3ng th\u1eddi, <strong>nhi\u1ec7t l\u01b0\u1ee3ng t\u1ecfa ra<\/strong> c\u0169ng l\u00e0 v\u1ea5n \u0111\u1ec1 v\u00ec m\u1eadt \u0111\u1ed9 c\u00f4ng su\u1ea5t t\u0103ng. V\u1ec1 ph\u00eda s\u1ea3n xu\u1ea5t, m\u1ed9t m\u00e1y scanner EUV ti\u00eau th\u1ee5 \u0111i\u1ec7n ~1 MW, c\u1ea3 fab ti\u00ean ti\u1ebfn c\u00f3 th\u1ec3 c\u1ea7n t\u1edbi h\u00e0ng ch\u1ee5c MW \u0111i\u1ec7n \u0111\u1ec3 v\u1eadn h\u00e0nh, l\u00e0m d\u1ea5y l\u00ean lo ng\u1ea1i v\u1ec1 ti\u1ebft ki\u1ec7m n\u0103ng l\u01b0\u1ee3ng v\u00e0 b\u1ec1n v\u1eefng.<\/li>\n<\/ul>\n\n\n\n<p>M\u1eb7c d\u00f9 \u0111\u1ed1i m\u1eb7t nhi\u1ec1u th\u00e1ch th\u1ee9c, c\u00e1c h\u00e3ng b\u00e1n d\u1eabn v\u1eabn ki\u00ean tr\u00ec theo \u0111u\u1ed5i ti\u1ebfn tr\u00ecnh thu nh\u1ecf. H\u1ecd b\u1ed5 sung nh\u1eefng c\u1ea3i ti\u1ebfn kh\u00e1c nh\u01b0 <strong>ki\u1ebfn tr\u00fac transistor m\u1edbi<\/strong> (FinFET sang NanoSheet\/GAAFET, r\u1ed3i t\u01b0\u01a1ng lai c\u00f3 th\u1ec3 CFET \u2013 x\u1ebfp ch\u1ed3ng nanotransistor), <strong>v\u1eadt li\u1ec7u m\u1edbi<\/strong> (si\u00eau v\u1eadt li\u1ec7u k\u00eanh d\u1eabn, d\u00e2y d\u1eabn), c\u0169ng nh\u01b0 <strong>\u0111\u00f3ng g\u00f3i 3D<\/strong> (g\u1eafn chiplet) \u0111\u1ec3 ti\u1ebfp t\u1ee5c t\u0103ng m\u1eadt \u0111\u1ed9 v\u00e0 hi\u1ec7u n\u0103ng m\u00e0 kh\u00f4ng ph\u1ee5 thu\u1ed9c ho\u00e0n to\u00e0n v\u00e0o thu nh\u1ecf k\u00edch th\u01b0\u1edbc \u0111\u01a1n thu\u1ea7n. Tuy nhi\u00ean, \u1edf g\u00f3c \u0111\u1ed9 quang kh\u1eafc thu\u1ea7n t\u00fay, ta \u0111\u00e3 r\u1ea5t g\u1ea7n nh\u1eefng gi\u1edbi h\u1ea1n v\u1eadt l\u00fd, \u0111\u00f2i h\u1ecfi c\u00e1c gi\u1ea3i ph\u00e1p mang t\u00ednh th\u1ebf h\u1ec7 ti\u1ebfp theo.<\/p>\n","protected":false},"excerpt":{"rendered":"<p>Hu\u1ef3nh C\u00f4ng T\u00fa Ng\u00e0nh c\u00f4ng nghi\u1ec7p b\u00e1n d\u1eabn tu\u00e2n theo \u0110\u1ecbnh lu\u1eadt Moore, li\u00ean t\u1ee5c thu nh\u1ecf k\u00edch th\u01b0\u1edbc transistor v\u00e0 t\u0103ng m\u1eadt \u0111\u1ed9 t\u00edch h\u1ee3p. C\u00e1c th\u1ebf h\u1ec7 c\u00f4ng ngh\u1ec7 \u0111\u01b0\u1ee3c g\u1ecdi theo \u201cnode\u201d (n\u00fat c\u00f4ng ngh\u1ec7) t\u00ednh b\u1eb1ng \u0111\u01a1n v\u1ecb nm, d\u00f9 gi\u00e1 tr\u1ecb nm ng\u00e0y nay ch\u1ec9 l\u00e0 t\u00ean g\u1ecdi mang t\u00ednh&#8230;<\/p>\n","protected":false},"author":1,"featured_media":4261,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_kadence_starter_templates_imported_post":false,"_kad_post_transparent":"","_kad_post_title":"","_kad_post_layout":"","_kad_post_sidebar_id":"","_kad_post_content_style":"","_kad_post_vertical_padding":"","_kad_post_feature":"","_kad_post_feature_position":"","_kad_post_header":false,"_kad_post_footer":false,"_kad_post_classname":"","footnotes":""},"categories":[3],"tags":[],"class_list":["post-4270","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-cong-nghe"],"_links":{"self":[{"href":"https:\/\/labantrithuc.com\/index.php?rest_route=\/wp\/v2\/posts\/4270","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/labantrithuc.com\/index.php?rest_route=\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/labantrithuc.com\/index.php?rest_route=\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/labantrithuc.com\/index.php?rest_route=\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/labantrithuc.com\/index.php?rest_route=%2Fwp%2Fv2%2Fcomments&post=4270"}],"version-history":[{"count":1,"href":"https:\/\/labantrithuc.com\/index.php?rest_route=\/wp\/v2\/posts\/4270\/revisions"}],"predecessor-version":[{"id":4271,"href":"https:\/\/labantrithuc.com\/index.php?rest_route=\/wp\/v2\/posts\/4270\/revisions\/4271"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/labantrithuc.com\/index.php?rest_route=\/wp\/v2\/media\/4261"}],"wp:attachment":[{"href":"https:\/\/labantrithuc.com\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=4270"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/labantrithuc.com\/index.php?rest_route=%2Fwp%2Fv2%2Fcategories&post=4270"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/labantrithuc.com\/index.php?rest_route=%2Fwp%2Fv2%2Ftags&post=4270"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}